Energy Efficient High Performance Computing Working Group Links and Events
 
 
 

Recommended Links

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Events

A list of GreenIT Conferences is avaiable at: GreenIT Conferences.org


September 2016

Event: Call for Papers (Updated paper submission deadline: 25th Sept. 2016)
Subject: 25th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP 2017)
Date/Time: March, 2016
Location: St. Petersburg, Russia
Note: See below for detailed information
Website: http://www.pdp2017.org/energy-management.html


November 2016

Subject: The International Workshop on Green ICT and Smart Networking (GISN 2016)
Date/Time: November 4, 2016
Location: Montreal, Quebec, Canada
Note: See below for detailed information
Website: http://www.cnsm-conf.org/2016/gisn2016.html

Event: Call for Papers
Subject: The Third Workshop on Low-Power Dependable Computing (LPDC)
              In conjunction with ICPP 2016: The 7th International Green and Sustainable Computing Conference (IGSC)
Date/Time: November 7-9, 2016
Location: Hangzhou, China
Note: See below for detailed information
Website: http://www.cs.utsa.edu/~dzhu/2016-LPDC.html

Event: Call for Papers
Subject: The First International Workshop on Resilience and/or Energy-aware techniques for High-Performance Computing
             (RE-HPC)
  In conjunction with ICPP 2016: The 7th International Green and Sustainable Computing Conference (IGSC)
Date/Time: November 7-9, 2016
Location: Hangzhou, China
Note: See below for detailed information
Website: http://graal.ens-lyon.fr/~abenoit/RE-HPC/

Event: Call for Papers
Subject: 4th International Workshop on Energy Efficient SuperComputing (E2SC). Held in conjunction with SC'16
Date/Time: November 13th-18th, 2016
Location: alt Lake City, Utah, USA
Note: See below for detailed information


January 2017

Event: Call for Papers
Subject: Second COSH Workshop on Co-Scheduling of HPC Applications
Date/Time: January 23-25, 2017
Location: Stockholm, Sweden
Note: See below for detailed information
Website: http://wwwi10.lrr.in.tum.de/~trinitic/COSH2017/

Event: 3rd Workshop on Approximate Computing (In conjunction with HiPEAC 2017)
Date/Time: January 25, 2017
Location: Stockholm, Sweden
Note: See below for detailed information
Website: http://wapco.inf.uth.gr/


February 2017

Event: Call for Papers
Subject: 2nd International Workshop on AI for Smart Grids and Smart Building (AISGSB17)
Held in conjunction with the Thirty-First AAAI Conference on Artificial Intelligence (AAAI-17)
Date/Time: February 4 or 5, 2017
Location: San Francisco, CA
Note: See below for detailed information
Website: http://www.cs.nmsu.edu/aisgsb17/


March 2017

Subject: 25th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP 2017)
Date/Time: March, 2016
Location: St. Petersburg, Russia
Website: http://www.pdp2017.org/energy-management.html


Event Details

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Event: Call for Papers (Updated paper submission deadline: 25th Sept. 2016)

Subject: 25th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP 2017)
Date/Time: March, 2016
Location: St. Petersburg, Russia

This special session aims at gathering researchers working in the broad areas of energy-efficient computing and communication systems. This session seeks submissions addressing the different aspects of system management for energy efficient parallel applications and platforms. Emphasis is given to approaches and analyses targeting real-world energy-efficient system implementations as well as novel approaches to energy-efficient design. This special session is organized in cooperation with the COST Action 1305, the Network for Sustainable Ultrascale Computing (NESUS).

Important Dates:

Updated_ paper submission deadline: 25th Sept.. 2016
Acceptance notification: 25th Oct. 2016
Camera ready due: 20th Nov. 2016
Registration: 20th Nov. 2016
Conference: 6th - 8th Mar. 2017

Topics:

  • Performance and power dissipation issues
  • Energy, performance and quality of experience trade-offs
  • Energy, thermal and power models for parallel applications and platforms
  • Energy efficiency issues in HPC
  • Optimization approaches for dynamic energy management
  • Hardware and application monitoring for energy efficiency
  • Green wired and wireless networking for distributed computing
  • Design and analysis of energy/performance benchmarks
  • Evaluation of approaches across domains, e.g., from embedded systems to server domains
  • Energy harvesting methodologies, techniques, and systems


Submission of Papers:

Prospective authors should submit a full paper not exceeding 8 pages in the Conference proceedings format ( double-column, 10pt) to the conference main track through the EasyChair conference submission system (http://www.easychair.org/conferences/?conf=pdp2017). The possibility to submit a paper to a special session will appear soon.

Double-bind review: the paper should not contain authors names and affiliations; in the reference list, references to the authors' own work entries should be substituted with the string "omitted for blind review".

Publication: All accepted papers will be included in the same volume, published by the Conference Publishing Services (CPS). The Final Paper Preparation and Submission Instructions will be published after the notification of acceptance. Authors of accepted papers are expected to register and present their papers at the Conference. Conference proceedings will be submitted to IEEE explore, CDSL, and for indexing among others, to DBLP, Scopus ScienceDirect, and ISI Web of Knowledge.

 
 
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Subject: The International Workshop on Green ICT and Smart Networking (GISN 2016)
Date/Time: November 4, 2016
Location: Montreal, Quebec, Canada
Website: http://www.cnsm-conf.org/2016/gisn2016.html

Motivation and Scope:

The International Workshop on Green ICT and Smart Networking (GISN 2016) will be held in conjunction with the International Conference on Network and Service Management (CNSM 2016) in Montreal, Quebec, Canada, October 31st - November 4th, 2016. 
New smart networked systems, like homes, factories, farms, grids or cities, are being introduced at unprecedented pace, helping tackle problems ranging from supply chain management to climate change. The integration of technology into a strategic approach to sustainability, citizen well-being, and economic development of society leads to multi-dimensional, encompassing different aspects of smartness and stressing the importance of interaction across multiple domains.

This one day workshop aims at bringing together researchers from both industry and academia to promote the discussion on smart and green solutions for stimulating, innovating, designing, provisioning, and optimizing networked society. We invite submissions on all aspects of networking and computing research that have a strong focus on smart technologies, cloud computing, green ICT, telecommunications, Future Internet, and environmental assessment.

Topics include, but are not limited to:

  • Green Data Centers
  • Green Cloud and Green Telco Cloud
  • Smart networking technologies
  • Energy efficiency in intra and inter data center network
  • Broadband access technologies
  • QoE/QoS
  • Life-cycle analysis for smart ICT
  • Sustainable Mobile Computing
  • Multiservice platforms
  • Renewable energy and ICTs
  • Power measurement and smart meters in Future Internet
  • Advanced analytical and behavioral learning systems

And their application to:

  • Cloud computing and Smart Cities
  • Smart home communications
  • Smart transportation
  • 5G and low-latency communications

Important Dates:

  • Paper submission: August 7, 2016
  • Notification of acceptance: August 21, 2016
  • Camera Ready: September 11, 2016
  • Workshop date: November 4, 2016

Submission of Papers

Paper submissions must present original, unpublished research or experiences. All submissions should be written in English with a maximum paper length of six (6) printed pages (10-point font) including figures.


Standard IEEE Transactions templates for Microsoft Word or LaTeX formats found at: http://www.ieee.org/conferences_events/conferences/publishing/templates.html

Proceedings:

Papers accepted for GISN 2016 will be included in the CNSM 2016 conference proceedings, IEEE Xplore, IFIP database and EI Index.  IFIP and IEEE reserve the right to remove any paper from the IFIP database and IEEE Xplore if the paper is not presented at the workshop.

Organizing Committee

Workshop co-chairs:

  • Dr. Mohamed Cheriet, Canada Research Chair, Ecole de Technologie Superieure, University of Quebec, Canada
  • Dr. Burak Kantarci, Clarkson University, USA

Technical program co-chairs:

  • Dr. Kim Khoa Nguyen, Ecole de Technologie Superieure, University of Quebec, Canada.
  • Dr. Emad Alsusa, University of Manchester, UK

Keynotes: Dr. Jaafar Elmirghani, University of Leeds, UK

Panel: IEEE Green ICT Intiative – roadmap

Moderator: Dr. Charles Despins, Ecole de Technologie Superieure, University of Quebec, Canada.

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Event: Call for Papers
Subject: The Third Workshop on Low-Power Dependable Computing (LPDC)
              In conjunction with ICPP 2016: The 7th International Green and Sustainable Computing Conference (IGSC)
Date/Time: November 7-9
Location: Hangzhou, China

NEWS: IEEE Transactions on Sustainable Computing (T-SUSC) special issue on LPDC.Selected top papers from the workshop will be invited to submit to this special issue!

Scope: As part of the IEEE-Technically sponsored International Green and Sustainable  Computing conference, the workshop on Low-Power Dependable Computing (LPDC) will be organized to address various design aspects of power efficient and dependable computing infrastructures. Dependable computing is normally achieved through various error reduction, detection and recovery techniques at different levels (for instance, circuit, architecture, operating systems, compiler and application software) in the systems. With the continuous technology scaling and miniaturization of computing systems, faults will become more common and it is imperative for most modern computing systems to deploy various fault-tolerance techniques. On the other hand, fault-tolerance does not come for free, and generally has power/energy/temperature implications, which warrants careful consideration since power/energy is the first-class system resource and has been emerging as the limiting factor for multicore scaling.

This workshop aims at establishing a specialized forum for practitioners and researchers from both industry and academia who work on different aspects of fault tolerance and power/energy efficiency to exchange ideas on how to achieve low-power dependable computing. In particular, understanding the interdependencies between reliability and power are important to consider, e.g., high power consumption may lead to elevated temperature that can further aggravate the reliability. To cover a broad range of research related to energy efficiency and dependable computing, the workshop will consider various levels (from circuits to software), components (from memory to computation) and systems (from battery-powered embedded systems to large scale reliable servers). The topics of interest include, but are not limited to, the following:

  • Energy-efficient redundant circuit design
  • Energy-efficient fault-tolerance architecture
  • Compilation techniques for reliability and low-power
  • Runtime management and scheduling algorithms for energy-efficiency and fault tolerance
  • Case study on low-power dependable systems
  • Emerging paradigms for low-power and dependable computing, for instance,   approximate computing, cross-layer design, etc.
  • Mitigating reliability threats (aging, soft errors, process variations) in Dark Silicon chips
  • Low-power reliable memory and storage systems
  • Low-power and reliable on-chip networks and communication

Author Information:

The workshop invites authors to submit papers related to the theme of this workshop. The submitted paper should describe original and unpublished work that are not concurrently under review elsewhere. The papers submitted to this workshop is limited to be six (6) single-spaced, double-column pages (with IEEE Computer Society Proceedings Manuscripts style: 11-point fonts and 8.5 x 11 inch), which should include everything (e.g., abstract, research description, figures, tables, and references). All submissions will be reviewed by the program committee.

The accepted papers will be included in the supplementary proceedings of IGSC, which will be published by the IEEE Computer Society and indexed by EI, subject to (1) One author of each accepted paper must register for the conference following the instructions on IGSC webpage at the time of the submission of the final manuscript; and (2) One of the authors must appear to present the paper at the workshop.


Papers should be submitted via EasyChair at https://easychair.org/conferences/?conf=lpdc2016

Important Dates:

Deadline: August 1, 2016
Notification: September 15, 2016
Camera-ready: October 1, 2016

Workshop Organizers and TPC Chairs:

  • Xiaomin Zhu - National University of Defense Technology, China
  • Muhammad Shafique - Karlsruhe Institute of Technology, Germany
  • Dakai Zhu - University of Texas at San Antonio, USA

Technical Program Committee (TPC):

  • Tam Chantem - Utah State University, USA
  • Alireza Ejlali - Sharif University of Technology, Iran
  • Hui Guo - University of New South Wales, Australia
  • Can Hankendi - AMD Inc. Germany
  • Sybille Hellebrand - The University of Paderborn, Germany
  • Houman Homayoun - George Mason University, USA
  • Zheng Li - Western Illinois University, USA
  • Saman Kiamehr - Karlsruhe Institute of Technology, Germany
  • Umit Ogras - Arizona State University, USA
  • Amir Rahmani - University of Turku, Finland
  • Semeen Rehman - Dresden University of Technology (TUD), Germany
  • Mohammad Sabry - Stanford University, USA
  • Jürgen Teich - Friedrich-Alexander University (FAU), Germany
  • Sara Vinco - The Polytechnic University of Turin,  Italy
  • Tongquan Wei - East China Normal University, China
  • Chengmo Yang - University of Delaware, USA

Xiaomin Zhu, Ph.D. 
Associate Professor
College of Information Systems and Management
National University of Defense Technology, Changsha 410073, China
Email: xmzhu@nudt.edu.cn / xmzhunudt@gmail.com 
https://www.researchgate.net/profile/Xiaomin_Zhu3
Office: +86 731-8457-4531 ext 802

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Event: Call of Papers
Subject: The First International Workshop on Resilience and/or Energy-aware techniques for High-Performance Computing
             (RE-HPC) 
In conjunction with ICPP 2016: The 7th International Green and Sustainable Computing Conference (IGSC)
Date/Time: November 7-9, 2016
Location: Hangzhou, China
Website: http://graal.ens-lyon.fr/~abenoit/RE-HPC/

Resilience and energy consumption have become two important concerns for high-performance computing (HPC) systems. With the increasing core count and technology miniaturization, today's large computing platforms (datacenters, clusters, supercomputers, etc.) are increasingly prone to failures. Faults are becoming norm rather than exception. Besides the classical fail-stop errors (such as hardware failures), soft errors (such as SDCs for silent data corruptions) constitute another threat that can no longer be ignored by the HPC community. Another concern is energy. Presently, large computing centers are among the largest consumers of energy, hence measures must be taken to reduce energy consumption. Energy is needed not only to power the individual cores but also to provide cooling for the system. In today's datacenters, a large proportion of energy is spent on cooling and thermal-related activities. It is anticipated that the power dissipated to perform communications and I/O transfers will also make up a much larger share of the overall power consumption. The relative cost of communication is expected to increase dramatically, both in terms of latency/overhead and of consumed energy. Re-designing algorithms for HPC systems to ensure resilience and to reduce energy consumption will be crucial to achieving sustained performance. The link between resilience and energy must also be carefully tackled. Better resilience often requires redundancy (replication and/or checkpointing, rollback and recovery), which consumes extra energy. Hot cores may lead to less resilient computing or increase the probability of individual failures. On the other hand, reducing the energy consumption via voltage/frequency scaling techniques will increase the application running time, and hence the expected number of failures during execution. 

This workshop will encompass a broad range of topics related to resilience and energy efficiency for HPC. Its objective is to facilitate exchange of valuable information and ideas among researchers and practitioners. Topics of interest include (but are not limited to):

  • Fault-tolerant algorithms, tools, and protocols
  • Checkpointing, replication, and recovery techniques
  • Detection and prediction of soft errors and SDCs
  • System reliability, testing, and verification
  • Resilience models, algorithms, and simulations
  • Energy-efficient scheduling and resource management
  • Power-aware runtime systems
  • Energy-efficient I/O, storage, and networking
  • Thermal behavior modeling, control and management
  • Cooling-aware optimizations and evaluations
  • Tradeoffs between performance, reliability, energy and temperature

Author Information:

All papers should be submitted electronically (in PDF format) following the guidelines of the International Green and Sustainable Computing (IGSC) Conference (http://www.green-conf.org/call_papers.html). Authors should select the workshop on Resilience and/or Energy-aware algorithms for High-Performance Computing (RE-HPC) when submitting their papers. All submitted manuscripts will be reviewed and evaluated on correctness, originality, technical strength, significance, quality of presentation, and interest and relevance to the scope of the workshop. Papers presented at the workshop will be published in the official conference proceedings (through IEEE Digital Library) contingent on two conditions: (1) One author of each accepted paper must register for the conference at the time of the submission of the final manuscript and (2) One of the authors must appear to present the paper at the workshop. Please note that each accepted workshop paper will require a full IGSC registration at the IEEE member or at the non-member rate (NOT student rate). This means that there is no separate workshop-only registration.

Important Dates:

Paper Submission: August 1, 2016
Author Notification: September 15, 2016
Camera-ready Paper: October 1, 2016

Workshop Co-Chairs:

Anne Benoit, ENS de Lyon, France
Jean-Marc Pierson, University of Toulouse, France
Hongyang Sun, ENS de Lyon, France

Program Committee:

  • Guillaume Aupy, Vanderbilt University, USA
  • Leonardo Bautista-Gomez, Barcelona Supercomputing Center, Spain
  • Pascal Bouvry, University of Luxembourg, Luxembourg
  • Georges Da Costa, IRIT, University of Toulouse, France
  • Zhihui Du, Tsinghua University, China
  • Amina Guermouche, The University of Tennessee, Knoxville, USA
  • Sebastien Lafond, Abo Akademi University and Turku Center for Computer Science, Finland
  • Herman Meer, University of Passau, Germany
  • Rami Melhem, University of Pittsburgh, USA
  • Ariel Oleksiak, Poznan Supercomputing and Networking Center, Poland
  • Dana Petcu, West University of Timisoara, Romania
  • Enrique Quintana-Orti, HPCA, Jeaume, Spain
  • Leonel Sousa, INESC, Portugal
  • Patricia Stolf, IRIT, University of Toulouse, France
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Event: Call for Papers
Subject: 4th International Workshop on Energy Efficient SuperComputing (E2SC). Held in conjunction with SC'16
Date/Time: November 13th-18th, 2016
Location: alt Lake City, Utah, USA

Submissions will be made through EasyChair (https://easychair.org/conferences/?conf=e2sc)

Description:

We will be ushering in an era with power and energy consumption as the primary concerns for scalable computing in the exascale era and beyond. To achieve viable high performance, revolutionary methods are required with a stronger integration among hardware features, system software and applications. Equally important are the capabilities for fine-grained spatial and temporal measurement and control to facilitate energy efficient computing across all layers. Current approaches for energy efficient computing rely heavily on power efficient hardware in isolation. However, it is pivotal for hardware to expose mechanisms for energy efficiency to optimize power and energy consumption for various workloads and to reduce data motion, a major component of energy use. At the same time, high fidelity measurement techniques, typically ignored in data-center level measurement, are of high importance for scalable and energy efficient inter-play in different layers of application, system software and hardware.

This workshop seeks to address important energy efficiency aspects in the HPC community that have not been previously addressed in the data center or cloud computing communities. Emphasis is given to the applications view related to significant energy efficiency mprovements and to the required hardware/software stack that must include necessary power and performance measurement and analysis harnesses.

Current tools are often limited by hardware capabilities and their lack of information about the characteristics of a given workload/application. In the same manner, hardware techniques, like dynamic voltage frequency scaling, are often limited by their granularity (very coarse power management) or by their scope (a very limited system view). More rapid realization of energy savings will require significant increases in measurement resolution and optimization techniques.  Moreover, the interplay between performance, power and reliability add another layer of complexity to this already difficult group of challenges.

Workshop Focus:

We encourage submissions in the following areas:

  • Tools for analyzing power and energy with different granularities and scope from hardware (e.g. component, core, node, rack, system) or software views (e.g. threads, tasks, processes, etc) or both.
  • Techniques that enable power and energy optimizations at different scale levels for HPC systems.
  • Integration of power aware techniques in applications and throughout  the software stack of HPC systems.
  • Characterization of current state-of-the-art HPC system and applications in terms of Power.
  • Disruptive hardware or infrastructure technologies for energy-efficient supercomputing.
  • Analysis of future technologies that will provide improved energy consumption and management on future HPC systems.
  • Tools and techniques for exploring trade-offs between energy efficiency and resilience.

Organizing Committee:

General Chairs: Kirk Cameron, Virginia Tech, USA
                          Adolfy Hoisie, PNNL, USA
                          Darren Kerbyson, PNNL, USA
                          David Lowenthal, Arizona State University, USA
                          Dimitrios S. Nikolopoulos,Queen's University of Belfast,UK
                          Sudha Yalamanchili, Georgia Institute of Technology, USA

Program Chair:  Kevin Barker, PNNL, USA                            
                          Rong Ge, Marquette University, USA

Publicity Chair:  Joseph Manzano, PNNL, USA

European Liaison:  Michele Weiland, EPCC, UK

Proceedings Chair: Andres Marquez, PNNL, USA

Provisional Program Committee:

Natalie Bates -  Energy Efficient HPC Working Group, USA
Laura Carrintgton - San Diego Supercomputing Center, USA
Sunita Chandrasekaran - University of Delaware, USA
Vladimir Getov - University of Westminster, UK
Roberto Gioiosa Pacific - Northwest National Lab, USA
Eric van Hensbergen - ARM, USA
Karen Karavanic - Portland State University, USA
Hyesoon Kim - Georgia Tech, USA
Dong Li - Oak Ridge National Lab, USA
Aniruddha Marathe - Lawrence Livermore National Lab, USA
Benoit Meister - Reservoir Labs, USA
Lenny Oliker - Lawrence Berkeley National Lab, USA
Tapasya Patki - Lawrence Livermore National Lab, USA
Barry Rountree - Lawrence Livermore National Lab, USA
Sameer Shende - University of Oregon, USA
Shauwein (Leon) Song - Pacific Northwest National Lab, USA
Nick Wright - Lawrence Berkeley National Lab, USA

Important Dates

  • Paper Submission - 2nd September 2016
  • Paper Notification - 23rd September 2016
  • Final Papers Due - 3rd October 2016
  • Conference Date - 14th November 2016

Submission Guidelines:

  • Papers should not exceed eight single-space pages (including figures, tables and references) using a 10-point on 8.5x11-inch pages.
  • Submissions will be judged on correctness, originality, technical strength, significance, presentation quality and appropriateness.
  • Submitted papers should not have appeared in or under consideration for another venue.
  • A full peer-review processes will be followed with each paper being reviewed by at least 3 members of the program committee.
  • Submissions will be made through EasyChair (https://easychair.org/conferences/?conf=e2sc)
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Event: Call for Papers
Subject: Second COSH Workshop on Co-Scheduling of HPC Applications (Co-located with HiPEAC 2017)
Date/Time: January 23-25, 2017
Location: Stockholm, Sweden

Overview

The task of a high performance computing system is to carry out its calculations (mainly scientific applications) with maximum performance and energy efficiency.  Up until now, this goal could only be achieved by exclusively assigning an appropriate number of cores/nodes to parallel applications. As a consequence, applications had to be highly optimised in order to achieve even only a fraction of a supercomputer's peak performance which required huge efforts on the programmer side. 

This problem is expected to become more serious on future exascale systems with millions of compute cores. Many of today's highly scalable applications will not be able to utilise an exascale system's extreme parallelism due to node specific limitations like e.g. I/O bandwidth. Therefore, to be able to efficiently use future supercomputers, it will be necessary to simultaneously run more than one application on a node. To be able to efficiently perform co-scheduling, applications must not slow down each other, i.e. candidates for co-scheduling could e.g. be a memory-bound and a compute bound application. 

Within this context, it might also be necessary to dynamically migrate applications between nodes if e.g. a new application is scheduled to the system.

In order to be able to monitor performance and energy efficiency during operation, additional sensors are required. These need to be correlated to running applications to deliver values for key performance indicators.

Main Topics

Exascale architectures, supercomputers, scheduling, performance sensors, energy efficiency, task migration

Important Dates

Paper Submission deadline: November 15, 2016
Notification: December 5, 2016
Camera ready: December 15, 2016
Workshop: January 23-25, 2017

Paper Submission

Workshop papers must not exceed 6 single-spaced, double-column pages in ACM style (including figures and references).
Submit your paper here.

Accepted papers will be published online in the TUM library. Upon acceptance of the submission, at least one author is required to register for the HiPEAC 2017 conference.

Contact Information

Organised by: Carsten Trinitis and Josef Weidendorfer Technische Universität München, Institut für Informatik
Lehrstuhl für Rechnertechnik und Rechnerorganisation
Institut für Informatik
Technische Universität München
Boltzmannstr. 3, 85748 Garching bei München
Phone: +49 89 289 18458
E-Mail: {Carsten.Trinitis | Josef.Weidendorfer} <at> tum.de

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Event: 3rd Workshop on Approximate Computing (In conjunction with HiPEAC 2017)
Date/Time: January 25, 2017
Location: Stockholm, Sweden

Workshop Description
Research in the last few years has focused on approximate computing as a means to overcome the energy scaling barrier of computer systems. Such savings can be achieved by utilizing the inherent error resilience of algorithms in many application domains such as signal processing, multimedia, data analytics and computational engineering. Indeed, fully accurate arithmetic in specific phases of a computation in those applications may have only a marginal effect on output quality, especially if combined with error correction frameworks such as iterative refinement. Thus, accurate execution may be traded off for lower energy consumption by providing the ability to scale supply voltage below nominal values or to use lower precision arithmetic (i.e. 8 or 16 bit).
Rather than focusing on a single layer, designing such systems in a general-purpose computing environment requires a holistic view of all layers from algorithms, programming models, system software, and hardware down to the transistor level. This full-day workshop is an inter-disciplinary effort to bring together researchers from the areas of mathematics, computer science, computer and electrical engineering to discuss challenges, risks and opportunities of approximate computing in all design layers. Papers will not be published in proceedings, so submitting to WAPCO will not preclude future publication opportunities. We are soliciting original papers on topics that include but are not limited to the following:

  • Formal and mathematical methods for approximate computing
  • Programming languages and models for approximate computing
  • Compiler and system software support for approximate computing
  • Hardware support for approximate computing
  • Hardware-software interaction for approximate computing
  • Applications that can benefit from approximate computing
  • Simulation and modeling techniques for approximate computing
  • Position papers on the potential and limitations of approximate computing

Important Dates

Submission deadline:

November 18, 2016

Notification of decision:

December 9, 2016

Organizers

Nikolaos Bellas

University of Thessaly, Greece

Georgios Karakonstantis

Queen’s University Belfast, UK

Dimitris Gizopoulos

University of Athens, Greece

Program Committee

Nikolaos Bellas

University of Thessaly, Greece

Dimitrios Nikolopoulos

Queen’s University Belfast, UK

Andy Burg

EPFL, Switzerland

Uwe Naumann

RWTH-Aachen, Germany

Georgios Karakonstantis

Queen’s University Belfast, UK

Christos Antonopoulos

University of Thessaly, Greece

Spyros Lalis

University of Thessaly, Greece

Costas Bekas

IBM Research – Zurich

Vincent Heuveline

University of Heidelberg, Germany

Holger Froening

University of Heidelberg, Germany

Enrique Quintana – Orti

Universitat Jaume I de Castellon, Spain

Dimitris Gizopoulos

University of Athens, Greece

Pedro Trancoso

University of Cyprus

Stefano Di Carlo

Politecnico di Torino

Ramon Canal

UPC, Barcelona

Sek Chai

SRI, International, USA

Lukas Sekanina

Brno University of Technology, Czech Rep.

Contact nbellas@inf.uth.gr for questions.

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Event: Call for Papers
Subject: 2nd International Workshop on AI for Smart Grids and Smart Building (AISGSB17)
Date/Time: February 4 or 5, 2017
Location: San Francisco, CA

Workshop Description and Motivation:

The availability of advanced sensing and communication infrastructures, electric monitoring facilities, computational intelligence, widespread use and interest in renewable energy sources, and customer-driven electricity usage, storage and generation capabilities, have posed the foundations for a robust and dynamic next generation economic interplay between the demand-side: smart buildings, and the supply-side: smart power grids. Three key aspects distinguish this evolving economy from more traditional market forces:

(1) Information: both energy producers and consumers have access to information (e.g., production costs, customers electricity needs, time distribution of demands);

(2) Exchange: communication is possible on a continuous basis, thus enabling both individual as well as group decision processes (e.g., producers and consumers can negotiate prices and energy exchanges);

(3) energy can be produced not only by power plants, but also by customers (e.g., via solar panels) and stored for later use (or redistributed through the electric grid), and

(4) given all of the above, customers can employ advanced tactical measures for improving building operations and reducing energy consumption without sacrificing occupant satisfaction, which has direct economic implications for producers.

In general terms, a smart grid enables the distributed generation and two-directional flow of electricity and information, within an integrated system of connected smart buildings as key agents within this new ecosystem.

AI plays a key role in the relationship between the smart grid and smart buildings. New technologies offer infrastructure that provides information to support automated decision making on how to (automatically) adapt production/consumption, optimize costs, waste, and environmental impact, and provide reliability, safety, security, and efficiency. Indeed, several research projects have already developed the view of this ecosystem as a multi-agent system, where agents coordinate and negotiate to achieve smart grid and smart building objectives.

The goal of this workshop is to bring together researchers and practitioners from diverse areas of AI to explore both established and novel applications of AI techniques to address problems related to the design, implementation, deployment, and maintenance of both smart buildings and the smart grid –
either as independent topics or together in an overarching multi-agent system.

Topics include, but are not limited to:

  • Distributed decision making and distributed optimization
  • Agents and multi-agent applications in smart grids
  • Data analytics and machine learning techniques applied to smart buildings, grids and energy management
  • Advanced machine learning techniques used to improve building maintenance and operations and reduce energy consumption without sacrificing occupant satisfaction
  • Novel information and sensing technologies that can be used to enable the deployment of advanced machine learning and data mining techniques within the built environment
  • Knowledge-based methods in design of smart buildings and smart grids
  • Coordination of intelligent agents in smart grids
  • Negotiation and trading strategies in energy markets
  • Human-computer interactions and human-in-the-loop systems within smart grids
  • Simulations of energy markets and smart grids

Workshop Format:

The workshop is expected to be a full-day event. It will include three components:

  • one invited keynote speaker, selected among leading researchers exploring the advanced use of AI techniques to address practical issues of smart grids and smart buildings;
  • a collection of presentations selected from peer-reviewed submissions, in response to an open call for papers;
  • a closing panel, including both invited panelist and workshop participants, to discuss future directions of research in this field.

Submission Guidelines:

Participants should submit a paper (maximum 6 pages + 1 page of references), describing their work on one or more of the topics relevant to the workshop.
Accepted papers will be presented during the workshop and will be published as AAAI technical reports, which will be made freely available in AAAI's digital library. 

Authors are requested to prepare their papers using the AAAI style files http://www.aaai.org/Publications/Templates/AuthorKit.zip).

All submissions are conducted via the following website:
http://www.easychair.org/conferences/?conf=aisgsb2017.
Submissions should include the name(s), affiliations, and email addresses of all authors in the body of the email. We welcome the submission of papers rejected from the AAAI 2017 technical program. The deadline for receipt of submissions is October 21, 2016. Papers received after this date may not be reviewed.

Submissions will be refereed on the basis of technical quality, novelty, significance, and clarity. Each submission will be thoroughly reviewed by at least two program committee members.

For questions about the submission process, contact the workshop co-chairs.

Important Dates:

  • October 21, 2016 - Submission Deadline
  • November 18, 2016 - Acceptance Notification
  • December 8, 2016 - Camera-Ready Deadline
  • February 4 or 5, 2017 - Workshop Date

Organizing Committee:

Rodney Martin, NASA Ames Research Center
Enrico Pontelli, New Mexico State University
Son Cao Tran, New Mexico State University
Long Tran-Thanh, University of Southampton

Contact Information:
aisgsb2017@easychair.org

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