Upcoming Events

 

September 2019

 

Event: Call for Participation - International Summer School on Architectures and Algorithms for Energy-Efficient IoT and HPC Applications

In conjunction with - 10th NiPS Summer School 2019

Date/Time: September 3rd to the 6th, 2019

Location: Perugia (Italy)

Website: https://www.nipslab.org/nips-summer-school-hpc-iot-2019

Note: See below for detailed information

 

October 2019

 

Event: Call for Participation - IEEE Infrastructure Conference

Date/Time: October 16-17, 2019

Location: The Westin St. Francis, San Francisco, CA USA

Website: https://infrastructure.ieee.org/

Note: See below for detailed information

 

Event: Call for Papers The Tenth International Green and Sustainable Computing Conference (IGSC’19)

Subject: Technically co-sponsored by IEEE Computer Society and IEEE STC on Sustainable Computing

Date/Time: October 21-24, 2019

Location: Alexandria, VA, USA

Website: https://www.igscc.org/https://www.igscc.org/

Note: See below for detailed information

 

Event: Call for Papers (GREEN 2019, The Fourth International Conference on Green Communications, Computing and Technologies)

Date/Time: October 27, 2019 to October 31, 2019

Location: Nice, France

Website: http://www.iaria.org/conferences2019/GREEN19.html

Note: See below for detailed information

 

November 2019

 

Event: Tenth Annual Workshop for the Energy Efficient HPC Working Group (EE HPC WG)

Date/Time: Monday, November 18th 9:00AM-5:30PM SC19 Denver, Colorado USA

Location: Denver, Colorado USA

Note: See below for detailed information

 

March 2020

 

Event: Call for Papers March 3, 2020

Special Issue on "Performance, Power and Energy-Efficiency Optimization in Computer Architectures"

Energies, MDPI (ISSN 1996-1073) - Open Access Journal

Ranked Q1 in Scopus/Scimago - Impact Factor: 2.707 (2018)

Website: https://www.mdpi.com/journal/energies/special_issues/Energy_Computer_Architectures

Note: See below for detailed information

 

 

September 2019

 

Event: Call for Participation - International Summer School on Architectures and Algorithms for Energy-Efficient IoT and HPC Applications

In conjunction with - 10th NiPS Summer School 2019

Date/Time: September 3rd to the 6th, 2019

Location: Perugia (Italy)

Website: https://www.nipslab.org/nips-summer-school-hpc-iot-2019

 

Early registration deadline: June 30, 2019

Final application deadline: July 31, 2019

 

International Summer School on Architectures and Algorithms for Energy-Efficient IoT and HPC Applications

 

The Summer School on “Architectures and Algorithms for Energy-Efficient IoT and HPC Applications" is a 4-day school bringing together well-known international scientists from academia, research centers and industry. The school offers the opportunity to students and young researchers to be aware of the state-of-art on the development of energy-efficient computer architecture, algorithms and their applications to the Internet of Things (IoT) and High-Performance Computing (HPC) domains.

 

The Summer School is organized by the Noise in Physical Systems Laboratory (http://www.nipslab.org<http://www.nipslab.org/>) in collaboration with the OPRECOMP project (http://oprecomp.eu<http://oprecomp.eu/>), and it is open to everybody. Previous training or experience in computer science as well as a background in computer architecture or compilation is recommended.

 

Scientific Program

 

Day 1 (Tuesday, September the 3rd)

•  Memory Systems and Memory-Centric Computing Systems: Challenges and Opportunities (Onur Mutlu – ETH Zurich, Switzerland)

•  Understanding performance numbers in HW Design (Frank K. Gürkaynak – ETH Zurich, Switzerland)

•  PULP: A Multi-Core Platform for Micropower In-Sensor Analytics (Davide Rossi, University of Bologna, Italy)

 

Day 2 (Wednesday, September the 4th)

•  Energy efficient heterogeneous design (Luca Benini – University of Bologna, Italy)

•  Approximate (Trans-Precision) Computing Without Re-Inventing the Wheel (Andreas Burg – EPFL, Switzerland)

•  Summer of Code presentations (Elevator speeches by the SoC winners – part 1)

 

Day 3 (Thursday, September the 5th)

•  Energy Efficient Inter-Chip Communication in Heterogeneous Application Domains (Vasilis Pavlidis – University of Manchester, United Kingdom)

• TBA (Andrea Calimera – Politecnico di Torino, Italy)

•  Efficient Memory Controller Architectures and their Integration in Transprecision Compute Platforms (Christian Weis – University of Kaiserslautern, Germany)

• Summer of Code presentations (Elevator speeches by the SoC winners – part 2)

 

Day 4 (Friday, September the 6th)

• TBA (Dimitrios Nikolopoulos – Queen’s University Belfast, United Kingdom)

•  Dynamic Application Autotuning for Approximate Computing (Cristina Silvano – Politecnico di Milano, Italy)

•  Enabling Machine Learning on FPGA (Mirko Mariotti – University of Perugia, Italy)

•  Neural Network tutorial on GAP8 AI processor (Francesco Paci – GreenWaves Technologies, France)

 

Lectures will run on mornings and afternoons from 9:00 to 18:00, except on Wednesday when an excursion in the afternoon will take place followed by the social dinner.

 

Poster Session

 

During the school we will give chance to young researchers to present their work through poster sessions which will span all days of the school. The poster sessions will provide an ideal opportunity for students to present their own work in progress and get feedback from senior researchers and fellow students, and can be the beginning of future collaboration.

 

Venue and Social Events

 

The Summer School will take place at the Hotel Giò in Perugia, in central Italy.

On September 4th at 15:45 we will have a touristic guided excursion to Assisi followed by the social dinner in a special location, with typical food and wine. Accompanying persons are welcome to the summer school. Touristic attractions and cultural events, will be running in Perugia during the summer school days and are located at walking distance from the school site.

 

Certificate

 

All participants will receive a certificate of attendance. Some universities will accept this certificate in their PhD program.

 

Admission

 

Please notice that school attendance is limited and the participation will be assessed on a first-come/first-serve basis, subjected to acceptance from the Organizing Committee.

 

Important Dates

 

June 30, 2019: deadline for early registration

July 31, 2019: deadline for late registration

 

Registration

 

The registration fee includes: 7 coffee breaks, 4 lunches and a programmed excursion with the social dinner.

Early registration (until June 30 2019): 450 €

Late registration (from July 1 2019):  600 €

 

Accompanying persons are welcome, and can choose between the following options:

Option 1: 80 € - it covers the cost of the social dinner and the excursion

Option 2: 160 € - it covers the costs of 4 lunches, the social dinner and the excursion

 

Registration Step by Step

 

1. Please compile the Registration form: https://www.nipslab.org/summer-school-2019-registration-form/ selecting the track “Architectures and Algorithms for Energy-Efficient IoT and HPC Applications”.
2. We will review your application and you will receive a confirmation of admission by e-mail with instructions for the payment of the registration fee.
3. After the payment your registration is completed and you will receive an invoice.

 

Lodging

 

The School will take place at the Hotel Giò which will offers the possibility to stay at discounted rates for the Summer School participants. The school location is however very close to the city center and easily reachable from any hotel in the city center by foot or via public service.

 

How to reach Perugia

 

By Air

The closest airport to Perugia is the San Francesco airport located at 15 min drive.

Central Italy's closest major airports are in Rome, Pisa, and Florence. These can be easily reached by train, bus or car.

The major international gateway is Rome's Aeroporto Leonardo da Vinci, known as Fiumicino (FCO) (30 km/19 mi southwest of Rome).

Pisa's Aeroporto Galileo Galilei (PSA) (12 km/7 mi south of Pisa and 80 km (50 mi) west of Florence) has flights from London, Amsterdam, Brussels, and Paris)

Florence's Aeroporto A. Vespucci, known as Peretola (FLR) (10 km/6 mi northwest of Florence), has connections to Brussels, Paris, London, Rome, and Milan.

 

By Train

Arrival at Perugia Fontivegge Railways Station. Information on train schedule are available here: http://www.trenitalia.com/tcom-en

 

Steering Committee

 

• Igor Neri (University of Perugia, Italy)
• Frank K. Gürkaynak (ETH Zurich, Switzerland)
• Cristiano Malossi (IBM Zurich Research Laboratory, Switzerland)
• Enrique Salvador Quintana Ortí (Universidad Politécnica de Valencia, Spain)
• Davide Rossi (University of Bologna, Italy)
• Dimitrios Nikolopoulos  (Queen’s University Belfast, United Kingdom)
• Henri-Pierre Charles (CEA, France)
• Giuseppe Tagliavini (University of Bologna, Italy)

 

Scientific Director

 

• Luca Gammaitoni, NiPS Laboratory, Dipartimento di Fisica e Geologia, Università di Perugia

 

Contact information

 

NiPS Laboratory, Dipartimento di Fisica e Geologia, Università di Perugia via Pascoli 1 - I-06123 - Perugia (Italy)

Email:  school@nipslab.org<

 

 

October 2019

 

Event: Call for Participation - IEEE Infrastructure Conference

Date/Time: October 16-17, 2019

Location: The Westin St. Francis, San Francisco, CA USA

Website: https://infrastructure.ieee.org/

 

Calls for Participation

 

Demonstrate your knowledge and experience with infrastructure and artificial intelligence by speaking at IEEE Infrastructure Conference to be held on 16-17 October 2019 at the Westin St. Francis, San Francisco, California, USA.

 

Infrastructure 2019 will have both traditional papers (Wednesday, half day) and presentations only (Thursday, full day).

 

Compared to traditional conferences, this event focuses on industry: it is by industry and for industry. In addition to industry, academic and government authors who focus on the following criteria are also very welcome:

 

• Practical work that resulted in lessons learned and improvement over current practice
• Innovation is desirable, but not required element, papers that cover useful experiences are welcome
• Architecture, design, implementation, and deployment are of high interest
• Processes and best practices are welcome, but some connection to deployment and practical use is desirable
• User experience and lessons learned from deployments
• Negative results are welcome as long as there is a lesson learned from it and they are non-trivial
• Toolchains, DevOps, support, etc.
• Experience with non-functional requirements (security, performance, scale, reliability)

 

Proposed topics include:

 

• Understanding the evolving role of AI to automate, address complex challenges in extreme scale

• • Traditional data center management, DevOps

• • AI/ML/DL: Model size, training, edge vs Cloud
  • Performance analysis using Deep Learning
  • Leveraging systems, services design, and operational management

• Using AI for automation of operations

• • Design space exploration
  • Service design and management using AI techniques
  • Managing failures and lessons learned using real-world scenarios and examples

• Alert and remediation
  • Test failure generation using AI techniques
  • Successes and failure stories in applying AI to Infrastructure management
• Assessing trust models in your system paradigms
  • End-to-end trust
  • Using AI for anomaly detection of threats
  • Trust at Edge

 

 

Call for Papers

 

Regular paper submissions are up to 4 (four) pages maximum (exclusive of bibliography). To be considered for publication, one of the authors is required to attend the conference to make a full presentation of the work. Final paper submissions may be up to 8 pages (exclusive of bibliography).

 

Short paper submissions are up to 2 (two) pages maximum (exclusive of bibliography). To be considered for publication, one of the authors is required to attend the conference to make a full presentation of the work. Final paper submissions may be up to 4 pages (exclusive of bibliography).

 

Formatting instructions for all papers:

 

• They must be written in English and use standard IEEE two-column conference templates that can be downloaded from
  • https://www.ieee.org/conferences_events/conferences/publishing/templates.html.

• Only PDF files will be accepted for the review process. We will follow a double-blind review process. All paper submission PDFs must be ANONYMOUS and without author affiliations.

 

Accepted and presented technical papers will be published in the IEEE Infrastructure 2019 Conference Proceedings and submitted to IEEE Xplore®

 

Important Dates for Paper Submissions

 

• Paper Abstract Submission (200 words) Due: Sunday, 30 June 2019 (11:00 pm EDT)
• Paper Submission (regular or short) Due: Monday, 15 July 2019 (11:00 pm EDT)
• Author Notification of Acceptance: Sunday, 1 September 2019
• Final Paper (PDF) due: Sunday, 1 September 2019

 

Submit Paper Here

 

Call for Speakers

 

To be considered for presentations only, the following must be included with your submission:

 

• Presentation Title
• Presentation Abstract suitable for program (200 words)

 

Important Dates for Presentation Submissions

 

• Presentation Submissions Due: Wednesday, 24 July 2019 (11:00 pm EDT)
• Speaker Notification of Acceptance: Friday, 30 August 2019
• Final Presentations Due: Friday, 11 October 2019

 

Submit Presentation Here

 

 

Event: Call for Papers The Tenth International Green and Sustainable Computing Conference (IGSC’19)

Subject: Technically co-sponsored by IEEE Computer Society and IEEE STC on Sustainable Computing

Date/Time: October 21-24, 2019, Alexandria

Location: Alexandria, VA, USA

Website: https://www.igscc.org/https://www.igscc.org/

 

Key Dates

 

• Conference Paper submission: May 27, 2019
• Deadline for submitting Workshop and Special Session proposals: May 1, 2019
• Deadline for submitting Ph.D. forum extended abstracts: July 15, 2019
• Notifications to authors: August 15, 2019
• Camera-ready papers due: September 1, 2019

 

IGSC’19 provides a forum for presenting and discussing innovative research on a broad range of topics in the fields of sustainable and energy-efficient computing and computing for a more sustainable planet. The conference consists of technical papers, panels, workshops, and a PhD Forum on these topics. Topics of interest include, but are not limited to:

 

• Track 1: High Performance and Cloud Computing
  • Power- and thermal-aware algorithms, software, and hardware, accelerators (including GPGPU/FPGAs), memory and storage systems, interconnection networks, optimized data management, efficient power delivery and cooling, data center organization and optimization, reliability, life-cycle analysis of IT equipment, hardware and software for large-scale data analytics and processing.

 

• Track 2: Computer Architecture
  • Power-efficient multi/many-core chip designs, architectures for machine learning and AI, approximate computing, non-turing architectures, power and thermal management, GPGPU architectures, reconfigurable architectures, memory systems, caches, networks-on-chip (NOCs).

 

• Track 3: Embedded Systems
  • Internet-of-Things (IoT), wireless sensor networks, energy harvesting, storage, and conversion, cyber-physical systems, secure embedded systems, wearable computing, computing for smart systems, interfacing sensors and actuators, real-time operating systems, scheduling and optimization.

 

• Track 4: VLSI Design
  • Low-power electronics and systems, emerging technologies, novel non-volatile memories, memory circuits, ASICs , reconfigurable computing and FPGAs, computer-aided design, thermal-aware circuits, design of sensors and actuators, analog, optical, non-digital circuits.

 

• Track 5: Computing for Sustainability
  • Computational methods for sustainable economy and society, renewable energy models and prediction, matching energy supply and demand, smart grids (macro and micro),smart transportation and electric vehicles, smart buildings and urban computing, smart manufacturing and industrial IoT, climate and ecosystem monitoring, IT solutions for water quality, air pollution, and sustainable agriculture.

 

Paper submission guidelines:

 

IGSC’19 welcomes submissions that have not been published and that are not under review by other conferences or journals. All submissions will be evaluated on their originality, technical soundness, significance, presentation, and interest to the conference attendees. Please refer to the IGSC website (https://www.igscc.org/) for specific instructions related to paper submission.  Upon approval from IEEE, IGSC conference proceedings will be published by IEEE (in IEEE Xplore).

 

Best paper award and journal publication:

 

IGSC bestows a best paper award as selected by a technical committee.  In addition, a special issue based on best contributions to IGSC 2019 in SUSCOM (Sustainable Computing: Informatics and System), an Elsevier SCI-indexed journal, is under consideration.

 

Workshops:

 

Proposals are solicited for workshops to be held in conjunction with the conference. Proposals should be submitted to the Workshops Chair (axgeec@rit.edu).

 

Ph.D. Forum and Project Demos:

 

The forum solicits extended abstract submissions from doctoral students engaged in research on sustainable and energy-efficient computing a well as poster and project demos from all researchers, faculty, and students. Please refer to the IGSC website for submission instructions.

 

Industrial Partners:

 

The conference seeks industry partners and sponsors with opportunities for them to showcase their technologies. Please contact the steering committee chairs for additional information.

 

Organization:

 

• General Co-Chairs: Alex Jones (University of Pittsburgh, USA), akjones@pitt.edu and Massimo Poncino (Politecnico di Torino, Italy), massimo.poncino@polito.it

 

• Technical Program Co-Chairs: Michele Magno (ETHZ Zurich, Switzerland), michele.magno@iis.ee.ethz.ch and Ann Gordon-Ross (University of Florida, USA), anngordonross@ufl.edu

 

• Workshops Chair: Amlan Ganguly, (Rochester Institute of Technology, USA), axgeec@rit.edu

 

• PhD Forum Chair: Mahdi Nikdast (Colorado State University, USA), Mahdi.Nikdast@colostate.edu

 

 

 

Event: Call for Papers (GREEN 2019, The Fourth International Conference on Green Communications, Computing and Technologies)

Date/Time: October 27, 2019 to October 31, 2019

Location: Nice, France

Website: http://www.iaria.org/conferences2019/GREEN19.html

 

From data center air-coolers to on-chip implementations, energy conservation is predominant and innovative research is ongoing to address this huge energy drain. The need to limit or recover energy consumed has an associated cost.

 

New strategies are being developed with a goal to limit the energy consumption of data centers.  However, nothing comes for free. Compared

to an ideal solution, practical Green initiatives have associated costs to overcome and researchers & industry have to between the cost and

benefits. This track examines the concepts associated with current green energy initiatives and the cost benefit analysis.

 

The main objective of this track is to explore industrial practices and research initiatives, that address the challenges in implementing green

initiatives in the field of computing, storage, network and cooling technologies in data centers, such as (i) air cooling initiatives, (ii) managing compute servers, (iii) energy oriented storage solutions, (iv) networking techniques and (v) related economic and reliability studies (iv) industry studies related to Green technologies.

 

Topics include, but not limited to:

• Green initiatives in data center Energy management & architectures

• Compute, Storage & Networking Applications and test results

• Quality of Service issues in Green computing

• New business and economic models

• Cross-layer cost benefit optimization

 

Important Datelines

Inform the Chair: As soon as you decide to contribute (http://www.iaria.org/conferences2019/filesGREEN19/CGI_DC.pdf)

Submission: August 31

Notification: September 20

Registration: September 30

Camera-ready: September 30

 

Contribution Types

• Regular papers [in the proceedings, digital library]

• Short papers (work in progress) [in the proceedings, digital library]

• Posters: two pages [in the proceedings, digital library]

• Posters: slide only [slide-deck posted on http://www.iaria.org]

• Presentations: slide only [slide-deck posted on http://www.iaria.org]

• Demos: two pages [posted on http://www.iaria.org]

 

Paper Format

• See: http://www.iaria.org/format.html [both LaTex and .doc templates]

• Before submission, please check and comply with the editorial rules: http://www.iaria.org/editorialrules.html

• More information on camera ready preparations will be posted after the paper notifications are sent out.

 

Publications

• Extended versions of selected papers will be published in IARIA Journals: http://www.iariajournals.org

• Print proceedings will be available via Curran Associates, Inc.: http://www.proceedings.com/9769.html

• Articles will be archived in the free access ThinkMind Digital Library: http://www.thinkmind.org

 

Paper Submission

http://www.iaria.org/conferences2019/filesGREEN19/CGI_DC.pdf

Please select Track Preference as GDI-DC

 

Registration

• Each accepted paper needs at least one full registration, before the camera-ready manuscript can be included in the proceedings.

• Registration fees are available at http://www.iaria.org/registration.html

 

Contacts

Sanjeev Sondur: sanjeev.sondur@temple.edu

GREEN Logistics: steve@iaria.org

 

 

November 2019

 

Event: Tenth Annual Workshop for the Energy Efficient HPC Working Group (EE HPC WG)

Date/Time: Monday, November 18th 9:00AM-5:30PM SC19 Denver, Colorado USA

Location: Denver, Colorado USA

 

ABSTRACT:

 

Despite significant pressure on both Moore’s Law and Dennard scaling, the appetite for ever larger systems continues to grow. Computing trends, in terms of highly optimized hardware platforms that may leverage accelerators or other non-traditional components, scalable and highly performing applications, and the requirements to manage exponentially larger data sets are driving facility demands not envisioned just a few years ago. The facility demands for supercomputing centers (SCs) are characterized by electrical power demands for computing systems that scale to tens of megawatts (MW) and millisecond voltage fluctuations approaching 10MW for the largest systems. The demand for primary electrical distribution capabilities to current large-scale facilities can exceed 60MW. The operational costs of these facilities must be balanced versus the demand from the systems owners and users for high availability, high utilization, and low-impact facility maintenance and service demands. To achieve this balance, many SCs continue to innovate their operational design practices and technologies.

 

The workshop for the Energy Efficient HPC Working Group brings together those concerned with HPC energy efficiency and energy conservation of both HPC systems and facilities. The annual workshop has a broad scope of energy efficiency in HPC ranging from silicon and components, through platform integration, software, and firmware and up to the data center, facility, and connection to the utility provider. Because of this broad scope, we engage a wide spectrum of participants- both facilities and operationally focused people as well as computer engineers and architects- which enhances the discussions and sharing that occurs.

 

 

March 2020

 

Event: Call for Papers March 3, 2020

Special Issue on "Performance, Power and Energy-Efficiency Optimization in Computer Architectures"

Energies, MDPI (ISSN 1996-1073) - Open Access Journal

Ranked Q1 in Scopus/Scimago - Impact Factor: 2.707 (2018)

Website: https://www.mdpi.com/journal/energies/special_issues/Energy_Computer_Architectures

 

SCOPE AND OBJECTIVES:

 

To satisfy the growing demands for higher application performance and reduced power and energy consumption, performance and energy efficiency optimization has become a fundamental constraint and requisite, embracing the processor architectures (homogeneous/heterogeneous

many-core GPPs), the accelerators and co-processors (e.g., APUs, GPUs, etc.), and even the embedded domain (e.g., SoCs, FPGAs, ASICs, etc.), where the development of energy-saving methodologies is a fundamental issue  not only  for mobile, hand-held and wireless applications but also to reach exascale computing.

 

The need to satisfy the required performance levels, as well as the new thermal, power and energy constraints, require the definition of innovative solutions to attain an effective optimization of the offered throughput and/or minimization of the power/energy consumption. Among

many other research directions, this challenge naturally involves the design of high performance and energy-efficient architectures and communication infrastructures, as well as the development of novel algorithms and tools comprising the scheduling, mapping, load-balancing, and scalability, together with innovative compilation techniques.

 

The goal of this Special Issue is to collect novel contributions covering prevailing issues and prominent challenges related to optimizing the performance, power, and energy efficiency in computing devices and systems.

 

Topics of interest include (but are not limited to) the following:

 

• Computer architecture trends for performance and energy efficiency:

•  ISA diversity and morphable structures;
•  Run-time reconfiguration/adaptation and dynamic scalability;

• CPU accelerator co-design (GPUs, APUs, FPGAs, etc.);

• Heterogeneous and parallel processing architectures;

• Approximate computing techniques and architectures;

• • Neuromorphic architectures.

• Energy/power management and control:

•  Run-time power/energy monitoring and sensing;

• Performance, power, energy and heat/temperature modeling;

• Dynamic Voltage and Frequency Scaling (DVFS);

• Power/clock gating strategies;

• Performance vs. power/energy scaling and management.

• • Tools and algorithms:

• Programming languages, compilers and models for energy-aware computing;

• Profiling and simulation tools for heat/power/energy estimation;

• Scheduling, mapping and task/thread migration policies for performance and power/energy optimization;

• Performance- and energy-aware resource management;

• Operating system support and energy management tools.

 

GUEST EDITORS:

 

• Leonel Sousa, INESC-ID, Instituto Superior Técnico, Universidade de Lisboa, Portugal (las@inesc-id.pt)

• Nuno Roma, INESC-ID, Instituto Superior Técnico, Universidade de Lisboa, Portugal (nuno.roma@inesc-id.pt)

 

 

INSTRUCTIONS FOR PAPER SUBMISSION:

 

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to

go to the submission form. Manuscripts can be submitted until the deadline. All papers will be peer-reviewed. Accepted papers will be

published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review

articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

 

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Energies is an international peer-reviewed open access semimonthly journal published by MDPI.

 

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 1800 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

 

--

Nuno Roma

INESC-ID, IST, Universidade de Lisboa

http://sips.inesc-id.pt/~nfvr