DATE 2018, will take place from 19 to 23 March, 2018, at the International Congress Center in Dresden, Germany.
The conference addresses all aspects of research into technologies for electronic and embedded systems engineering. The conference has a dedicated track for Application Design (Track A). This track is devoted to the presentation and discussion of design experiences with a high degree of industrial relevance, real-world implementations, and applications of specific design and test methodologies.
We invite you to submit papers to this track and particularly to topic A1 - Power-efficient and Sustainable Computing. This topic focuses on application design experiences and real implementations of power-efficient systems or circuits with high industrial relevance or high environmental impact, especially targeting ultra-low-power, high-performance, or large-scale computing systems (such as MPSoCs, mobile systems, massively parallel computers, 2D/3D multi-/many-core systems, high-performance computing clusters, data centers, and cloud systems). New highlights of this year are emerging topics in power-efficient computing, such as machine learning based approaches for power and energy management, as well as emerging neuromorphic architectures for highly energy efficient computing systems.
Main themes of interest (but not limited to) of A1 topic:
Emerging trends in energy-efficiency, like neuromorphic architectures and approximate computing
Emerging communication or computing systems (e.g., power-efficient machine learning accelerators)
Software architectures for energy-efficient computing
Resource management techniques
Innovative data-center management strategies
SW/OS-level implementations in real systems and data centers
Energy-efficient big data management
Data centers powered by renewable energy sources and data centers in smart grids.
Topic Chair: Muhammad Shafique, Technische Universität Wien, AT
Topic Co-Chair: Baris Aksanli, San Diego State University, US
Power and energy are now recognized as first-order constraints in high-performance computing. Optimizing performance under power and energy bounds requires coordination across not only the software stack (compilers, operating and runtime systems, job schedulers) but also coordination with cooling systems and outwards to electrical suppliers. As we continue to move towards exascale and extreme scale computing, understanding how power translates to performance becomes an increasingly critical problem.
The purpose of this workshop is to provide a forum where cutting-edge research in the above topic can be shared with others in the community. We welcome submissions addressing power aware computing issues. All papers will be subject to single-blind peer review, and the quality of standard papers is expected to be high.
Topics of particular interest include (but are not limited to):
Performance optimization under node, job, cluster and site power bounds
Power/performance trade-offs across accelerators, processors and DRAM
Translating budgetary bounds into power and energy bounds
Power-efficient system design, from computer center to silicon
Effects of compiler optimizations on application power and energy efficiency
Power- and energy-aware job schedulers, runtime systems and operating systems
Models of power and performance, from processors and components to computer centers
Evaluations of hardware power and energy controls
Applications specific power and energy optimization
Papers should not exceed ten single-spaced pages for long papers (including figures, tables and references) or four single-spaced pages for short papers (not including the references) using 12-point font on 8.5x11- inch pages.
Submissions will be judged on correctness, originality, technical strength, significance, presentation quality, and relevance.
Submitted papers should not have appeared in or be under consideration for another venue. A full peer-review process will be followed with each paper being reviewed by at least three members of the program committee.
Submissions should follow the IEEE Conference Proceedings templates found at:
Camera-ready copy will need to conform to IPDPS guidelines; these will be announced during author notification.
Shuaiwen Leon Song, Pacific Northwest National Lab and College of William & Mary
Natalie Bates, Energy Efficient HPC Working Group
Ang Li, Pacific Northwest National Lab
Joseph Manzano, Pacific Northwest National Lab
Paper Submission (for both short and long papers): January 29th, 2018
Paper Notification: February 28th, 2018
Final Paper Due: March 7th, 2018
Event: Call for Papers
Subject: OPTIM'2018 - Int. Workshop on Optimization of Energy Efficient HPC & Distributed Systems
Date/Time: July 16-20, 2018
Location: Orléans, France
Papers: Submission deadline March 19, 2018
Scope and Objectives
Energy efficiency optimization has gradually become one fundamental constraint and requisite in the design of High Performance Computing (HPC) and Distributed Systems, comprehending several prominent research domains embracing the processor architectures (homogeneous/heterogeneous many-core GPPs), the processing accelerators and co-processors (e.g., APUs, GPUs, FPGAs, etc.), the distributed infrastructures (clusters, grids, data centers, etc.), the distributed platforms (application models, framework runtimes and virtual machines), and the underlying network and communication subsystem. Moreover, even in the embedded domain, saving energy in battery-supplied devices is established as a fundamental issue in mobile, hand-held and wireless applications and in most pervasive systems.
Accordingly, due to the often imposed thermal, power and energy constraints, an effective minimization and optimization of the energy consumption surpasses the obvious economic impact of the energy cost, since it also directly affects other aspects of the overall infrastructure with a significant influence on its viability, including the power supply and its distribution, cooling mechanisms (cost and space overhead) and management techniques, etc.
These new challenges require innovative and effective solutions to attain an effective optimization and/or minimization of the power consumption in HPC and distributed systems, including energy-efficient architectures, scheduling and mapping algorithms, load-balancing and scalability studies, and communication protocols.
The goal of this workshop is to bring together active researchers who are interested in prevailing issues and prominent challenges related to optimizing computing systems power consumption, energy efficient systems, power-aware distributed systems, and green computing.
The OPTIM workshop topics of interest include (but are not limited to) the following:
Computer architecture trends for energy efficiency: Heterogeneous parallel processing architectures (e.g., ARM big.LITTLE); ISA diversity and morphable structures; run-time reconfiguration/adaptation and dynamic scalability; CPU-accelerator co-design (GPUs, APUs, FPGAs, etc.); approximate computing techniques and architectures.
Energy/power management and control: Run-time power/energy monitoring and sensing; heat/power/energy models; Dynamic Voltage and Frequency Scaling (DVFS) and power/clock gating strategies; performance vs. power/energy scaling and management.
Energy-aware large scale distributed systems: energy-efficient grids, clouds and data centers; exascale computing systems; energy-aware virtualization techniques for energy efficiency; energy-aware frameworks; virtual machines and network infrastructure management.
Energy-aware communication: energy-efficient models, protocols and routing algorithms applied in the physical (PHY), data-link (MAC), network (IP), transport (TCP/UDP) and middleware layers above; energy-efficient cross-layer protocols; energy trade-offs between communication and computation; energy-efficient network services and operations.
Tools and algorithms: Programing languages, compilers and models for energy-aware computing; profiling and simulation tools for heat/power/energy estimation; power- and thermal-aware scheduling, mapping and task/thread migration policies for energy efficiency; energy-aware resource management; operating system support and energy management tools.
Green Computing: models, methodologies and paradigms; sustainable computing; management and balance between performance, reliability and energy consumption; standardization and benchmarking for energy-aware systems; integration with smart grids.
Both theoretical papers and papers describing systems implementations and real-world practical experiences will be welcome.
Instructions for Paper Submission
You are invited to submit original and unpublished research works on above and other topics related to optimization issues in energy efficient high performance and distributed computing systems. Submitted papers must not have been published or simultaneously submitted elsewhere.
Submission should include a cover page with authors' names, affiliation addresses, phone numbers, and email addresses. Indicate clearly the corresponding author and include up to 6 keywords from the above list of topics and an abstract of no more than 400 words. The full manuscript should be at most 8 pages using the two-column format. Additional pages will be charged additional fee. Short papers (up to 4 pages), poster papers and posters (please refer to HPCS webpage for the posters submission details) will also be accepted for submission. In case of multiple authors, an indication of which author(s) is responsible for correspondence must be indicated. Please include page numbers on all submissions to make it easier for reviewers to provide helpful comments.
Only PDF files will be accepted, uploaded to the submission link above. Each paper will receive a minimum of three reviews. Papers will be selected based on their originality, relevance, significance, technical clarity and presentation, and references. Submission implies the willingness of at least one of the authors to register and present the paper, if accepted. At least one of the authors of each accepted paper will have to register and attend the HPCS conference to present the paper at the Workshop.
Accepted papers will be published in the conference proceedings. Instructions for final manuscript format and requirements will be posted on the HPCS web site. It is our intent to have the proceedings formally published in hard and soft copies and be available at the time of the conference. The proceedings is projected to be included in the IEEE Digital Library and indexed in major indexing services accordingly.
Abstract Submission (EasyChair): ................................. March 12, 2018
Paper Submissions (EasyChair): ................................... March 19, 2018
Acceptance Notification: ................................................. April 15, 2018
Camera Ready Papers and Registration Due by: .......... May 3, 2018
Conference Dates: ......................................................... July 16 – 20, 2018
Dr. Nuno Roma
INESC-ID, Instituto Superior Técnico, Universidade de Lisboa
Dr. Luís Veiga
INESC-ID, Instituto Superior Técnico, Universidade de Lisboa
Technical Program Committee
All submitted papers will be rigorously reviewed by the workshop technical program committee members following similar criteria used in HPCS conference.
Lawrence Livermore National Laboratory
7000 East Avenue • Livermore, CA 94550
Operated by Lawrence Livermore National Security, LLC, for the Department of Energy's National Nuclear Security Administration